Posted on 2013-05-12. By anonymous.
English | 1994 | ISBN: 981021488X | 397 pages | Djvu | 3,9 MB
Discussing algorithmic aspects of VLSI layout, this text includes coverage of: issues in timing driven layout; LP formulation of global routeing and placement; Stockmeyer's floorplan optimization technique; the Manhattan and knock-knee routeing modes; and parallel algorithms for placement.
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